Digital Logic Design BSCS 2nd Term Past paper 2016 UOS

Posted by Ayesha

University of Sargodha
BS 2nd Term Examination 2016
Subject: Computer Science
Paper: Digital Logic Design (CMP:2210)
Time Allowed: 2:30 Hours
Maximum Marks: 80

Objective Part (Compulsory) (2*16)

Q.1. Write short answers of the following in two lines each.
i. Convert into equivalent binary number (1AF)₁₆
ii. Write BCD equivalent of Excess-3.
iii. Express -99 as an 8-bit number in the sign-magnitude, 2’s complement form.
iv. Add the following BCD numbers: 1011010 + 1001101
v. Using Boolean algebra techniques, simplify this expression: A + B + A(B + C) + B(B + C)
vi. Prove that $ A \cdot \overline{A} = A + B $
vii. Draw the gate implementation of the function: $ A + B + C + \overline{B} $
viii. Minimize the following SOP using K-Map: $ A \cdot B + A \cdot B \cdot \overline{C} + A \cdot C + A \cdot B \cdot \overline{C} $
ix. Determine the logic required to decode (1011)₂ producing a HIGH on the output.
x. Draw a diagram of SR-Latch using NAND gates.
xi. Explain how an Exclusive-NOR gate is used to compare to binary bits.
xii. What is the difference between Serial in/ Parallel out registers and Parallel in/ Parallel out registers?
xiii. What is a latch? Draw the logic circuit for SR latch.
xiv. Draw the logic diagram of XOR gate using all NAND gates.

Subjective Part (4*12)

Q.2. What are counters? Draw BCD up/down counter using synchronous counter.
Q.3. Convert the following Boolean expression into Standard SOP:
$ B \cdot \overline{C} + A \cdot B + A \cdot \overline{B} \cdot C + A \cdot \overline{C} \cdot D + A \cdot B \cdot C + A \cdot \overline{B} \cdot C $
Q.4. Map the standard SOP on a K-map simplify and implement it using logic diagram.
Q.5. Differentiate between Look ahead Carry Adders and Ripple carry.
Q.6. What are Universal Property of NAND and NOR gates? Explain with examples.
Q.7. Define an Encoder. Also explain and draw truth table for a 16 x 4 encoder.
Q.8. Implement an Edge-Triggered T flip flop. Describe its functioning and draw truth table.

Link

For more information on digital logic design, you can visit Khan Academy: Digital Circuits